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Add Systemverilog language support

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Co-authored-by: cinnamontoastmafia <brianna.k.loomis@gmail.com>
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Spencer Williams 2020-08-27 13:33:26 +02:00 • committed by Alex Dima
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commit c77b1099da
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src/systemverilog/systemverilog.contribution.ts Normal file
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/*---------------------------------------------------------------------------------------------
* Copyright (c) Microsoft Corporation. All rights reserved.
* Licensed under the MIT License. See License.txt in the project root for license information.
*--------------------------------------------------------------------------------------------*/
'use strict';
import { registerLanguage } from '../_.contribution';
registerLanguage({
id: 'systemverilog',
extensions: ['.sv', '.svh'],
aliases: ['SV', 'sv', 'SystemVerilog', 'systemverilog'],
loader: () => import('./systemverilog')
});
registerLanguage({
id: 'verilog',
extensions: ['.v', '.vh'],
aliases: ['V', 'v', 'Verilog', 'verilog'],
loader: () => import('./systemverilog')
});